PXI Platform for Semiconductor ATE

As average sales prices for devices decrease, the cost of testing needs to decrease at the same or greater rate. The PXI platform for semiconductor ATE may be the answer.

This is an excerpt from a white paper available from Geotest – Marvin Test Systems.

The electronics industry is under constant pressure to lower its manufacturing costs. This is particularly true for semiconductor suppliers, who face an environment where the cost of test has continually been looked at as a “no value-add” cost. The ratio or percentage of ATE capital cost as a percentage of an IC’s average sales price (ASP) has progressively decreased, moving from a high of 5% in 2001 to approximately 1% in 2010. The reality is that increasing traditional or “big ATE” test system utilization by employing techniques such as parallel test (quad, octal, etc. site tests) yields only limited improvements in testing expenses without really solving the core problem of test system costs. And for test needs in the development lab, failure analysis labs, or for low volume production, a multi-site test strategy does nothing to improve the economics of test.

Today’s semiconductor devices include a variety of digital, analog, and RF capabilities all combined in a single package or SoC (system on chip). The result is that test solutions must not only be cost-effective but also flexible in order to address a range of circuit types including logic, memory, analog, MEMs, and RF devices. Test solutions are needed that can offer engineers the ability to cost-effectively automate design verification, failure analysis, and pilot production test activities without requiring the use of expensive “big ATE.”

The challenge for today’s test engineers is to create new test methods and systems that can offer significantly lower test costs as well as address the need for configurable, flexible, test solutions. COTS (commercial off-the-shelf) hardware has always played some part in semiconductor ATE solutions — sometimes augmenting “big iron” systems and in other cases, providing automated test setups for prototype device characterization. Recent advancements in PXI (Compact PCI Extensions for Instrumentation) digital, analog, and RF test products and systems now make it possible for test engineers to address a range of ATE device test needs with the PXI platform. In particular, PXI digital products that offer tester per-pin features, including a parametric measurement unit (PMU) per-pin architecture as well as PXI test systems that incorporate these features, are now offering ATE semiconductor test capabilities with high value and performance. In addition, these PXI test systems are providing test engineers cost-effective ATE that can be used for failure analysis, prototype device verification, and pilot/early production runs, allowing the “big iron” ATE to be focused on the volume production test applications while providing engineering test groups with ATE features in a compact and configurable platform.

Semiconductor Test Requirements

Basic test needs for digital and mixed-signal devices include both DC parametric and functional tests. For the DC tests, all of a device’s pins must be characterized, which requires a PMU (parametric measurement unit). A PMU, which can source voltage/measure current or source current/measure voltage, must be able to access all of the device’s pins that require some type of switching/multiplexer if a single PMU is used. Once DC characterization is completed, functional testing of the device can be performed. In this case, a digital instrument with sufficiently deep memory, per channel programmability (voltage, loads, and direction), and real-time comparison capability provides the key features for performing functional tests.

The combination of a single-channel PMU, switching network, and digital instrument rapidly becomes unwieldy and performance-limited for moderate- to high-pin-count devices. Additionally, the combination of switching time and programming/measure time for a DC test can easily require tens or even hundreds of milliseconds, requiring long test times for the DC parametric tests.

A better solution and one typically employed by proprietary ATE or “big iron” systems is to incorporate a PMU per pin or channel, resulting in superior test performance (both for speed and measurement accuracy). Today, instruments such as Marvin Test Solutions’ GX5295, which features 32 channels of digital I/O with a per-pin PMU architecture, are available as part of a compact PXI test platform such as the TS-900, which offers users a high channel count digital and mixed-signal test system in a small, compact PXI chassis footprint.

Automating Semiconductor Tests

Today’s test engineers are under constant pressure to shorten test development time and become more efficient when creating test programs. The incorporation of a test development framework, in conjunction with software tools that can automate the creation and execution of device tests, provides test engineers with a powerful software development environment for enhancing test development and deployment productivity. For example, Marvin Test Solutions’ TS-900 includes ATEasy, a full-featured test executive for managing program development and deployment, and ICEasy, a test library that simplifies the creation and execution of standard device tests, provides interactive tools for plotting I-V characteristics, and supports two-dimensional Shmoo plots.

PXI Systems for Semiconductor Test

With the availability of instrumentation and software that addresses semiconductor test needs, test engineers now have the option to adopt the PXI architecture for current and future ATE requirements. Systems such as the TS-900 offer comparable features and performance to proprietary ATE systems and support up to 512 digital I/O channels within a compact, 20-slot, PXI chassis using 16-/32-channel GX5295 digital instruments. Additionally, by standardizing on the PXI platform, users have the ability to augment their system by incorporating a wide range of instrumentation, including SMUs, digitizers, and AWGs, as well as RF signal sources and analyzers.

The TS-900, with its integrated, high performance, modular receiver interface, is the ideal platform for users looking to optimize the overall test strategy for a product’s life cycle. Employing a TS-900 as part of the new product introduction process or for automating a manual setup offers significant advantages compared to a manual or semi-automatic bench top test configuration. For example, the test development, fixturing, and, most importantly, test times will be long for a manual setup, since very little if any of the test instrumentation is optimized for device testing. Employing a test system such as the TS-900 can offer engineers a much faster and more highly automated process for characterizing devices — decreasing device characterization and verification from weeks to days. Additionally, the TS-900 can cost-effectively address the testing of early production devices without relying upon “big iron” ATE with its expensive capital cost (test time), fixturing and long test development times. With a wide offering of software tools and an intuitive software development/test executive environment (ATEasy), the TS-900 fills the need for a test platform that can bridge the test gap between the engineering lab and volume production test.

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