The Shift to 85-Ohms System Impedance and Its Impact on Interconnect Links

The Shift to 85-Ohms System Impedance and Its Impact on Interconnect Links
By David Sideck, FCI Global Market Manager – High Speed & Power Products

As data rates push toward 10 Gb/s in typical server applications, designers of IC packages such as microprocessors encounter constraints at the packaging level. The long and thin traces in large packages with hundreds or even thousands of pins, and hundreds of differential pairs can lead to significant signal loss. The commonly used differential impedance of 100 ohms to minimize loss is not optimal for large IC packages. Alternatives to reduce loss with the standard differential impedance of 100 ohms were found to be uneconomical. However, silicon vendors have determined that large packages with an impedance of 85 ohms can be designed at significantly less loss compared to packages of 100 ohms.

This solution for IC packages has implications throughout the system. Impedance discontinuities in a channel cause internal reflections, resulting in signal loss and jitter, which eventually degrades system performance in the push to higher data rates. Ideally, the differential impedance of the components in the channel should also match 85 ohms to minimize these effects. Board designs, connectors, and connector footprints are all affected.

Impact on Board Design
Starting from a 100-ohm board design, board and trace geometries can be adjusted in several ways to achieve 85-ohm trace impedance. Three options for an 85-ohm design are shown in Figure 1:

Maintain the trace width and the routing density and reduce the board thickness. Thinner boards provide a cost advantage. Thinner boards can also result in better via performance (shorter via stub and barrel length).
Keep the board build-up and the trace width unchanged, but move the traces within a differential pair closer together. This option reduces the required routing width and increases the routing density. Because of the higher coupling between the traces within a pair, caused by moving the traces closer together, the losses will slightly increase.
Keep the board build-up and the routing density fixed, and increase the trace width.

Figure 1: Three options for an 85-ohm board design: Reduce the board thickness, reduce the trace separation, or increase the trace width.

An early example of a trace impedance requirement centered near 85 ohms appears in the PCI Express^® Card Electromechanical Specification, Revision 2.0, released April 2007. The document establishes that the differential trace impedance for a 5 GT/s capable signal pair must be in the range of 68 ohms to 105 ohms on both the system board and add-in cards. Although this differential impedance requirement does not explicitly apply to vias, connectors, package traces, or other structures, it is recommended that designs covered by this PCI Express form factor specification should still attempt to minimize the impedance discontinuities in high-speed channels.

Impact on Connector Design and Connector Footprint
High-speed differential signals for I/O or memory often have to pass through at least one connector. In server systems, there are also requirements for links that include a second connector to enable PCI Express connections across a system board, a riser card, and an add-in card.

High-performance connector designs that are optimized for 100-ohm differential impedance can introduce impedance discontinuities and unacceptable signal loss when inserted in 85-ohm channels. To adapt connectors to an 85-ohm environment, connector designers can vary contact geometries and dielectric material selection to reduce impedance mismatch. Contact interface, internal contact structure, and termination area geometries should all be considered during the design process. However, requirements to maintain backward compatibility with legacy connector interfaces or board footprints limit the available design options. Simulation tools enable FCI product and signal integrity engineers to evaluate various design options to achieve optimal high-speed electrical performance in an 85-ohm environment.

Other critical elements affecting channel performance are the through-hole vias used to route signals between layers in the circuit board. It is important for vias to be designed for short stub lengths to minimize resonances and losses as well as impedance mismatch between the vias and board traces. The impedance of a via is determined by its geometry (e.g., hole diameter, pad diameter, barrel length) and its position in relation to other vias when it is part of a connector footprint. Many connectors have a footprint impedance below 85 ohms, so the resulting discontinuity in an 85-ohm channel is significantly less than in a 100-ohm channel.

Because design options are more limited for optimizing press-fit connector footprints, surface-mount BGA footprints are also receiving consideration. Unlike vias that must be positioned to match the footprint of a press-fit connector’s tails and sized to accommodate the press-fit tails, BGA footprints offer more flexibility in the placement of vias and facilitates the use of smaller diameter via holes in the connector footprint. Smaller diameter vias result in increased impedance, and can be used to bring the differential impedance closer to 85 ohms.

Recent Developments
Since FCI and Intel presented “Improving System Performance by Reducing System Impedance to 85 Ohms” at the February 2007 DesignCon conference, systems employing 85-ohm channels have moved from being a topic of technical discussions to reality. In 2009, new-generation server platforms now provide support for 5 GT/s PCI Express links and Intel^® Quick Path Interconnect (Intel^®QPI) links between processors or processors and I/O controllers. With the Intel^®QPI architecture offering transfer rates of 6.4 Gb/s to > 8 Gb/s per lane, memory bandwidth utilization is significantly lower, enabling multiple bi-directional 10 GbE ports in a server.

FCI has developed several high-performance AirMax VS^® 85-ohm connectors to support Intel^®QPI links. Initial connector configurations include a right-angle receptacle, vertical headers, and a right-angle header to support right-angle or coplanar connection topologies. These products have been tested and fully comply with differential insertion loss, impedance, and crosstalk requirements.

Figure 2: AirMax VS^® 85-ohm connectors to support Intel^®QPI links in backplane or coplanar board-to-board applications.

At DesignCon 2009, leading designers of high-performance backplane connectors were actively promoting 85-ohm connector systems for use in PCI Express or Intel^®QPI applications, providing additional evidence that system designers’ adoption of 85-ohm differential impedance and the demand for connectors optimized for use in 85-ohm environments continues to grow.

David Sideck has held various connector product management and marketing positions during his 30-year career with FCI. He currently is FCI’s global market manager for the high speed and power products business line. He can be reached at david.sideck@fci.com.

Intel^®is a registered trademark of Intel Corporation. PCI Express^® is a trademark of PCI-SIG.