PCB Design and Material Selection Drive High-Speed Performance
By Bob Hult, Bishop & Associates Inc.

Like any successful marriage, a well-designed high-speed channel is the result of a series of carefully considered compromises made to achieve a reasonable balance between potentially conflicting factors. Design engineers often must find ways to bring what appear to be incompatible requirements together in order to satisfy overall system goals.

For instance, system packaging density and clock frequencies are continuing to increase, forcing engineers to design high-speed circuits in closer proximity, increasing the potential for crosstalk. Smaller PCB trace widths allow more circuits per layer, but direct current and skin effect losses limit the ability to reduce their size. High-performance devices demand more power, increasing the challenge to deliver higher current and maintain junction temperatures below critical levels.

Backplane-based systems present a series of challenges that must be addressed at each stage of the layout, fabrication, and assembly process in order to achieve specified performance. The design of the board and choice of PCB materials are two very basic areas that will have a huge influence on the ultimate success or failure of the product.

The performance of a typical high-speed channel is influenced by every element in the circuit path, including the driver connection and trace characteristics on the daughtercard, the connection to the backplane, the length and characteristics of the multilayer backplane traces, the connection to the second daughtercard, possibly a mezzanine connection, and finally, to the pins on the receiver chip.


Each new project is rarely launched with a clean sheet. The circuit designer often begins with a set of limitations, including experience, available materials, test equipment, and simulation software tools. Restraints established by the internal or contract manufacturing location can immediately narrow the available options.

The ability to maintain consistent impedance control throughout the channel has always been important to maximize the amplitude of the delivered signal and minimize reflections, but as frequencies reach upwards of more than 5 Gb/s, the tolerance for impedance discontinuities in a transmission line decrease. This requires careful control of design and manufacturing tolerances of line widths and spaces, PCB material thickness, as well as the choice of connector. Recent efforts to introduce differential circuits based on 85Ω rather than traditional 100Ω adds a new wrinkle.

Adoption of high-speed serial signaling has made the use of differential signaling very attractive. Rather than use a single line referenced to a common ground, differential signaling uses a pair of lines. The voltage difference measured between the pair determines the one or zero state.

Beyond improved high-speed performance, differential pair signaling offers a degree of resistance to radiated electromagnetic interference (EMI). External noise is impressed on both sides of the pair. Since signal levels are measured as the difference between the two lines, the effect of EMI is effectively cancelled.

Another consideration is choosing between microstrip or stripline routing. Microstrip, with its use of air dielectric, offers lower attenuation, tighter coupling, and enables the use of thinner dielectrics, but it limits circuits to the top layer. Stripline is used in multilayer PCBs and offers greater density and reduced far-end noise. Most systems use a combination of both techniques.

The relationship between differential pairs in the PCB and connectors creates another decision point. Circuits can be either edge-coupled or broadside-coupled. Each option has its advantages and disadvantages, as well as a cadre of designers who favor its use.

Material properties that had little influence on circuit performance at low speed can become significant at gigahertz frequencies. Signal propagation tends to move from the interior toward the surface of a conductor as speeds increase. White papers written over the past few years have discussed how the surface roughness of PCB traces can cause attenuation of the signal due to skin effect. The degree of surface roughness of copper laminates is now a defined part of the material specification.

Three of the most critical areas of concern designers face in laying out a new channel include crosstalk, attenuation, and timing.

Crosstalk is the result of unwanted coupling between adjacent PCB traces or unshielded wire, and is a major source of signal distortion. Crosstalk comes in two flavors, forward and backward, both of which increase with the length of traces that are parallel with each other.

Attenuation of the signal comes from a variety of parameters, including the size and length of the conductors, reflections, and skin effect.

Timing is a critical aspect of a high-speed system. Signals must be synchronized to arrive at their destination at the right time, often a window of only a few picoseconds in length. To do this, the length of the physical circuit must be precisely controlled. Failure to compensate for signal path length variations results in signal skew and system havoc. Other factors, such as an interaction among pulses and EMI, can delay a portion of a high-speed signal, which results in a condition known as jitter. Excessive jitter degrades the ability of the receiver to discriminate the incoming signal.

A via provides a way to electrically connect circuits in multi-layer boards. The plated through hole (PTH) adds the ability to attach leaded devices to the board. But both have been identified as significant contributors to signal degradation.

A traditional PTH results in a vertical plated column that extends from the surface of the PCB to the bottom. Selected internal signal, or power layers, are connected to this column to compete the circuit. At lower speeds, this arrangement works well, but at higher speeds, transmission line effects create a “stub” below the lowest point of internal contact. The portion of the PTH below that point will generate reflections that can cause serious signal distortion. Several approaches have been used to minimize this problem.

Most board shops today drill out the unnecessary barrel from the underside of the board. Controlled depth drilling, or backdrilling, adds some cost, but is widely available.

Designers have found that reducing the diameter of the PTH can minimize the capacitive effect of these structures. The result has been a continuing trend of reducing the diameter of the hole from 0.6mm, for standard 2mm HM connectors, to 0.46mm for the Amphenol TCS GbX connector, to 0.41mm for the Molex Impact connector. Tyco Electronics recently introduced its Micro Action Pin, which is designed for a finished hole of only 0.22mm.

Amphenol TCS has introduced an alternate approach with a dual diameter design that uses a larger barrel for termination to the connector and a smaller barrel below that point.

Small diameter holes in thick PCBs are more difficult to drill and plate, add cost, and may limit the number of board manufacturers that can be qualified to work with the product.

Noise generated by via stubs can be greatly reduced by the use of blind and buried vias that start and end at their signal level connection points, but the extra cost associated with this technology has limited its use.

The footprint of a connector designed for high-speed circuits has been found to be a greater source of signal distortion than the connector itself. Connector manufacturers have modified the design of the launch to mitigate these effects. In some cases, differential pairs are offset or separated by ground lines. Others offer a suggested antipad design to minimize noise.

Another solution is to eliminate the PTH and attach connectors using surface mount technology. The large plated barrel is replaced with a surface pad and a small via for connection to internal layers.

High-speed PCB headers featuring ball grid array attachment have been introduced by ERNI and FCI.

Several other suppliers, including Molex and SAMTEC, now offer surface mount connectors that feature slugs of solder mechanically clinched to the connector tails. Connectors are placed on the surface of the circuit board and hot air reflow soldered.

The choice of PCB laminate material has a profound influence on the high-speed performance of a circuit. Modern PCB boards may consist of up to 60 layers of dielectric materials and copper foil sheets.

Traditional epoxy/glass FR-4 material has experienced a continual migration to higher performance with improved characteristics, including lower dielectric constant (Dk) and dissipation factors (Df).


Newer materials specifically developed to support microwave frequencies have entered the market. Along with higher performance levels, they bring signficant cost premiums.

These newer materials are designed specifically to support faster signal speeds. Their higher cost can often be balanced with their ability to maintain close impedance control using thinner dielectrics that result in higher packaging density. Thinner boards have shorter vias and plated through holes minimizing distortion. High-layer-count boards experience serious challenges in hole aspect ratios, as well as soldering problems. Using higher performance laminiates can reduce the effects of these issues. Longer traces can be designed, use less power, and contribute to improved signal integrity of the system.

Achieving electromagnetic compatibility (EMC) objectives is another critical aspect of the design process. The FCC and global standards groups take a dim view of electronic equipment that generate excessive emissions or are suseptible to damage in expected noisy operating environments. Emissions generated by high-speed circuits must be addressed with a variety of design options, including additional ground layers in the board, local shielding structures, the use of decoupling capacitors, filters on input/output lines, as well as shielded chassis and cables. These solutions consume PCB space, increase component part counts, increase complexity, and add cost.

The ultimate goal of all PCB designs is the abiliy to reliably deliver a recognizeable signal to its intended receiver. A wide open-eye pattern gives assurance to the designer that the equipment will function reliability.

The ability to achieve these goals, given all of the variables of EMI, environmental extremes, material and manufacturing tolearance variations, in addition to human error, is a real accomplishment, especially as system clock speeds approach 10 Gb/s and beyond.

Bishop & Associates Comments

1. As channel speeds increase into the multi-gigabit range, circuit design and proper selection of materials becomes critical for success.

2. Circuit engineers must often balance opposing objectives to manufacture a cost-effective and high performing solution.

3. Physical properties of materials that had little effect on performance at lower speeds, can become signficantly at multi-gigabit speeds.

4. Recently introduced design and simulation tools can provide a quick “what if?” analysis to determine the best trade-offs between mulltiple design alternatives.

5. Designing PCBs that satisfy mulltiple constraints may require more hand routing of the board, adding cost and delay to the development cycle.

6. New environmental regulations regarding material choices and recycleability put additional constraints on how electronic equipment is designed and manufactured.

The design of next-generation equipment will require even more compromise, as system speeds continue to increase.

Robert Hult
Director of Product Technology, Bishop & Associates Inc.
Robert Hult has been in the connector industry for more than 36 years. Hult began his career as a sales engineer for Amphenol. He joined AMP in 1972 and served in several management positions through 1996. In 1997, Hult joined Foxconn as group marketing manager for Intel in Chandler, Arizona, U.S. Prior to joining Bishop & Associates, Hult was the regional application engineering manager for Tyco Electronics.

Hult graduated in 1968 from Bradley University with a bachelor of science degree in electronics technology and a minor in business.