The need to transmit more data at higher speeds is changing system design. New strategies include developing connectors specifically for high-speed operations, maintaining signal integrity at high speeds, and using new protocols. Today, interconnect technology has morphed to meet the need for speed.
The continuous growth in IP services and access speeds has led to exponential growth in bandwidth demand, driving the need for higher-speed interfaces in routers and switches. That, in turn, has led to the development of new interconnect technology and new standards for 40Gb/s and 100Gb/s interfaces, and plans for 400Gb/s speeds are now materializing; there will be no rest for connector designers.
The need to transmit more data at higher speeds is changing system design. New strategies include developing connectors with features and capabilities specifically for high-speed operations, maintaining signal integrity at high speeds, and using new protocols.
For example, it’s becoming apparent that PAM4 (four-level pulse amplitude modulation) will play a growing role in this transition. NRZ (non-return-to-zero) signaling, an industry standard, is giving way to PAM4 modulation in many applications due to PAM4’s ability to process data rates of 56Gb/s, 100 Gb/s, and higher.
While PAM4 does offer important speed improvements over NRZ, its downside is that data must be encoded prior to transmission then de-encoded when received. This requires additional processing capability, making PAM4 more challenging to implement. Still, where high speeds are critical, the additional capability of PAM4 balances out the higher processing costs.
At the same time, it’s important to keep in mind that NRZ is still appropriate for certain high-speed applications. Indeed, new backplane connectors can provide data rates above 50Gb/s in both PAM4 and NRZ systems. Compared to in-line beams, these backplanes optimize signal integrity performance and improve insertion loss, enabling interface resonance frequency that exceeds 30GHz. They also deliver enhanced signal integrity by optimizing geometries and differential shielding that minimize impedance discontinuities and reduce crosstalk.
Meeting New Challenges
When speeds increase, traditional connector challenges are magnified. For example, higher-data-speed channels typically involve increased electromagnetic interference, higher crosstalk, and impedance discontinuities, so protection against these issues must be designed in. Also, the connectors described above typically have to work with existing headers (ensuring backwards compatibility), enabling integration into existing designs. For example, if only the daughtercard is enhanced, the same headers can be used.
Another issue with increased system speeds is maintaining appropriate signal integrity. One way to accomplish this is to remove high-speed signals from the PCB by applying high-speed copper cable. This alternative can be used with both 50Gb/s NRZ and 50Gb/s PAM4 live encoded serial traffic using QSFP cable assemblies and connector interfaces.
Tools to Expedite Design
With new designs required for high-speed connectors, tools that can reduce the time required to simulate system design are welcome. In traditional manual system simulation, each component is simulated independently. That means it can take a week or more to simulate individual system designs. When multiple design iterations are required, this can slow the design process down to a crawl.
Using a different approach, new software-based design tools employ libraries of pre-simulated models based on typical designs, materials, traces, and vias. Designers select the models they want, push the enter key on their computer, and get results almost immediately. The software allows first-order system approximation, giving designers new insight into critical parameters for developing a new system. Designers are being tasked with getting their systems to market more rapidly, and they are using more high-speed interconnects. As a result, automated design tools will gain in importance and value.
New Approach for Mezzanines
High-speed mezzanine systems offer another route to drive increasing data speeds. With tunable differential pairs that enable matched impedance configurations, single-ended lines, and power combined with a range of stack heights and compliant pin terminations, the high-speed mezzanine connectors are enabling data rates up to 56Gb/s. These are appropriate for high-speed infotech and telecom applications, among others.
The typical attachment for mezzanine connectors is either press-fit or SMT (along with some compression versions), with both options presenting advantages and disadvantages, such as the process easiness of a press-fit mezzanine connector, while SMT connectors typically drive enhanced performance by allowing footprint optimization and removing stub effect from the compliant pin. The downside is mainly centered on the rework aspect, which is more challenging than a press-fit attachment.
In recent times, new technologies have reduced the performance gap between SMT and press-fit, to the point that the difference is null in a real channel; so when matching the signal integrity it becomes more of a preference option to design either attachment method, which will be mainly driven by layout, routing, and board thickness (among other variables). In addition, compliant-pin technology allows system designers to rework the board and maximize system utility while achieving the necessary signal integrity.
Finally, employing a triad wafer design, the high-speed mezzanine connector offers the following options: High-speed differential pairs that can be tuned to 85- to-100-ohm impedances, single-ended triads for low-speed options, and power triads. As a result, designers need only one connector for different signal speeds, freeing up space on the PCB for a true reflection of the designer’s preferred pinout.
Thermal Management Strategies
As speeds increase and new modules enter the market, enhanced thermal management solutions are becoming a key element for next-generation systems.
For example, stacked connectors deliver higher speed but use about 4.5 to 5W more power — and produce more heat — in 100Gb/s QSFP modules than standard interconnects.
For the most part, temperatures in enterprise systems must be controlled to below 70°C in the module and below a 45°C ambient temperature in the enclosure. Otherwise, the result can be degradation in reliability and overall performance decline.
One successful new heat management approach is to design-in internal riding heat sinks and high-flow cages that can optimize air movement. Utilizing these technologies reduced overall temperature in an emulated 5W optical QSFP module by 9°C. Thermal management strategies like this one will be vital for next-generation modules that are required to support at least 7W (or more).
As we move into the fast-data future, new interconnect solutions must enable both advanced technology and increased network bandwidth. Successful products will need the capability to support a wide range of data rates using multiple connector shapes and sizes. New designs must meet demanding high-speed performance requirements while providing next-generation efficiency and reliability.
Author Jairo Guerrero is director of marketing, Enterprise Business Unit, Molex LLC.