If you’re in Santa Clara on January 20, don’t miss the DesignCon keynote address of Tektronix’s Pat Byrne, where he’ll discuss how to improve workflow integration throughout the product development process.
Pat Byrne, president of Tektronix, will be a keynote speaker at this year’s DesignCon. The show’s keynotes were selected to inspire and challenge chip, board, and systems designers as well as help prepare them for the challenges ahead. The lineup aims to cover the full engineering life cycle, from concept and creativity to testing and securing, as well as tips for entrepreneurial success. Byrne’s presentation is entitled, “Reduce Time to Market with Better Workflow Integration from Simulation to Test.”
We sat down with him recently for a preview of his talk as well as his thoughts on DesignCon.
Q: What will the audience learn at your keynote address at DesignCon?
A: In a consumer-driven electronics industry with faster and faster cycle times, organizations have shifted from linear, waterfall-style development methodologies to a highly parallel multi-organizational development approach. This has placed a new set of requirements on the tools and methodologies being used to design advanced electronics and the verification of those electronics in preparing them for the marketplace.
I will discuss the innovations in development needed to serve multi-organization development processes. We see changes in the role of test in design verification and in design simulation technologies. The focus needs to go from all of the accumulated risk being at the end of the development process to pushing more of that to the earlier phases in the development cycle. This is often referred to as “shift left.” It means shifting left from the testing phase of the development process to a design verification phase where testing, simulation, compliance, and validation tools work together.
Q: Why is the integration of design simulations and testing so important? In particular, how does this trend affect connectors, both for the connector manufacturers and the OEM design engineers that specify them for system designs?
A: Two trends are combining to drive the increasing need for integrating design simulation and test – the pressure to hit market windows within shorter and shorter cycle times and a demand for ever-increasing bandwidth at lower and lower power levels, resulting in decreasing signaling margins. A tighter coupling of measurement-supported simulation earlier in projects is an important step to meeting both of these challenges.
Decreasing signaling margins squeezes noise, loss, and jitter budgets on all three primary electronic interconnect elements – transmitter, channel, and receiver. In today’s electronic systems, connector performance has become critical to meeting overall signal integrity requirements along with transmitters and receivers. The need for interoperability within and between systems requires earlier and more comprehensive measurement-validated simulation and testing to better ensure that transmitters, receivers, channels, and connectors comply with operational envelopes.
Q: Why is DesignCon the perfect location for this presentation?
A: We are discussing trends and issues that have the potential to impact every electronics design engineer at some level, not just those directly involved in measurement and verification activities. DesignCon is one of the events where we can discuss this topic broadly with the industry. It’s important that we create partnerships that can develop solutions to enable design engineers to break down barriers between exciting new ideas and their commercial realization.
Q: What thoughts on the topic do you want to leave our readers with in anticipation of your address?
A: The pace of innovation is driven by consumer cycle times, which means that development cycles are highly compressed. This leads to the need for innovation to enable the complexities of new designs to be validated with a combination of techniques that previously involved separate phases and separate teams. Now it is more interdependent and more integrated.
It’s worth thinking about how your development teams work together to tackle the next major step in time-to-market performance, design complexity, and performance requirements. We believe this will mean new approaches that depend upon new tools, techniques, and team dynamics.
Q: Do you expect to see a focus on testing communications technologies, simulation, and measurement on the show floor?
A: Absolutely. Communications technologies are the “tip of the spear” in the battle to continuously increase information bandwidth within interconnect technologies and infrastructure. PAM-4 is a good example of how advanced modulation technologies and approaches can be used to increase information bandwidth without increasing bit rate. There are significant economic and technical motivations for harnessing and commercializing complex modulation approaches with no end in sight. So we expect simulation and measurement advances on communication technologies to be a major focus in this year’s show. Tektronix will showcase innovations in these areas, in our booth demonstrations and technical presentations.
Q: What are you looking forward to most at DesignCon?
A: A highlight for me is connecting with customers and partners. It’s always exciting to engage with customers who are solving challenging measurement problems on advanced designs.
Q: What will be the biggest difference between this year’s show floor and last year’s, in terms of the “hot” technologies or growing trends?
A: We don’t expect revolutionary changes in this year’s show floor but instead expect to see a continuation and evolution of ongoing trends of past years. PAM-4 continues to be hot as it transitions into practical commercialization and broad deployment. The same could be said about PCIe4.
You can catch Pat Byrne’s talk at DesignCon on Wednesday, January 20, at noon.
Before assuming his current role as president of Tektronix in 2014, Pat Byrne was a vice president at Danaher, Tektronix’ parent company. Prior to joining Danaher in 2012, Byrne was chief executive of Intermec Technologies, a publicly traded, radio frequency identification (RFID) specialist based in Everett, Wash. Before running Intermec, he spent eight years in executive roles at Agilent Technologies and 17 years at Hewlett-Packard Co.
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