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Q&A: Samtec on Signal Integrity

Recently we spoke to Julian Ferry, high-speed R&D manager at Samtec, to learn more about the latest developments in high-speed interconnects, which applications are driving them, and how Samtec is meeting the challenges. Read on for more from Samtec on signal integrity.

Julian Ferry, SamtecCS: What are the primary applications in which system designers would look to high-speed interconnects?

JF: “High speed” is a fuzzy term, and its definition can change over time.  A decade ago, applications were mostly concentrated in areas such as high-end computers, telecom and datacom, some military applications. But with continued increase in processing and networking speeds, they are now used practically anywhere a microprocessor can be found.

CS: Are there any applications where high-speed connectors would be a smart solution but in which they haven’t been used traditionally?

JF: It’s fairly well known that signal integrity (SI) problems increase as data rates go higher. But SI issues also increase as signal densities get tighter. So high-speed connectors can make a lot of sense in applications which require great density.

SI problems also increase as signal levels decrease. We see a lot of this today as system designers strive to decrease power consumption. So even if system speeds remain static, higher quality interconnects might be required for full functionality.

CS: What are some of the key developments in high-speed connectors in the last year or so?

JF: There’s a trend toward new approaches to specifying connectors and interconnects. Instead of focusing on individual components, some of the bleeding-edge systems are moving to channel- or path-based specs. The connectors, PCB traces, and associated vias, and possibly cables, are treated as a single lumped entity. Because of potential interactions between the various components, they just can’t be analyzed in isolation, so I think we’ll see this trend continue.

CS: What will be the greatest area of development for these products in the next year (or more)?

JF: 28Gb/s systems are starting to move into mainstream markets, so I think we’ll see a lot of effort there, in trying to develop some higher-density and possibly lower-cost interconnects that still offer the SI performance required at that speed. And of course, 40Gb/s is coming behind that, and some of the ASIC designers are roadmapping 56Gb/s already.

CS: What are the key drivers of technology advancements in high-speed connectors?

JF: Everybody wants faster data, and more of it. And we like devices that consume less power, and smaller is usually better, too. So these are goals for the system designers. The silicon providers are always pushing the envelope on this stuff, and when they increase speeds, lower voltage levels, or what have you, we must provide interconnects to support the new systems or get out of the business.  Simple as that.

CS: What are some challenges a design engineer may face when designing in high-speed connectors, and how do you recommend they overcome them?

JF: If the application has a good electrical specification, and a certain connector is required, then it may be as simple as getting assurance from the connector supplier that its connector meets the spec.

Otherwise, it can certainly be an engineering challenge!

Samtec usually recommends that the designer start by establishing the physical and mechanical constraints, and then work through the SI side. If super density isn’t a requirement, or if the connector path length can be kept very short, then there could be many connector options to choose from.

We have some first-pass, rule-of-thumb performance limits we sometimes use to drill down through connector options. But ultimately, a system-level circuit simulation will need to be performed, so you will need to obtain a model of the connector from the connector supplier. Most current simulation tools can utilize models in a Touchstone format, so that’s typically what we would provide today.

A high degree of confidence can be obtained from a simulation of the signal channel. This is essentially the path between the transmitting and receiving chips, and should include models of the PCB traces, breakout regions, connectors, and any cables that might be used. The output of the simulation would most likely be an eye pattern, which can be compared to the typical requirements for the receiver chip.

CS: How does Samtec quantify acceptable signal integrity in a high-speed circuit?

JF: If an industry or customer specification exists, we will test our connectors to ensure we meet it. This could be an evaluation of the traditional connector parameters such as insertion loss, return loss, and crosstalk. Or we might run a time-domain-based eye pattern test for a particular channel. We would typically do this in-house, but we will use a third party lab, if required.

Otherwise, it comes down to a case-by-case basis. Currently, we sometimes perform simulations of a representative channel, and essentially test to failure, extending the PCB traces of cable lengths until the eye pattern requirements can no longer be met.

We do this for many industry standard protocols, such as PCI Express or Ethernet, and provide this information in application notes. We also routinely perform this service for customers using their exact configurations.

CS: Do you offer any on-line tools to assist designers of high-speed circuits?

JF: Yes, we provide many online tools. We’re most excited about our newest tool, the Simulator, which is an online, s-parameter-based circuit simulator that allows customers to estimate the performance of a custom-designed channel.

Designers can explore the effects of various signal-to-ground ratios, cable or trace lengths, connector combinations, stack heights, etc. The simulations are typically completed in a few minutes. Various parameters such as return loss, insertion loss, crosstalk, and eye patterns can be studied. A model of the exact configuration can also be generated and downloaded for use in the customer’s simulation tools.

Of course, we still provide models for our connectors and cables, which are easily accessible on the website. In addition to the app notes mentioned earlier, we also provide detailed high-speed characterization reports of our interconnect products.

And our Signal Integrity Group can be accessed through email or chat sessions. This group is staffed with Signal Integrity Engineers who can help designers choose appropriate connectors, interpret test data, assist in using our models, or perform channel simulations for the designer.

CS: What applications are you seeing your FireFly Micro Flyover System being designed into?

JK: FireFly is an interconnect system that gives designers a choice of using either micro footprint optical or copper interconnects. This allows the designer to upgrade from an electrical system to an optical one using the same connector system on the board. The most common applications are “flyover” board-to-board, board-to-backplane, board-to-midplane, board-to-panel, and multi-module configurations. Industries that are interested in FireFly are high-performance computing, servers, test equipment, central office telecom, networking switches and routers, military, storage and data centers, medical, and video and high-resolution imaging, to name a few.

Visit Samtec online.

See more coverage of the FireFly Micro Flyover System in Connector Supplier.

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Patricia Staino

Contributor at Connector Supplier
Patricia Staino was the managing editor of ConnectorSupplier.com from 2012 to 2016. Prior to joining Bishop & Associates, she worked in public relations for several connector companies.
Patricia Staino

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